diff mbox series

[Concept,3/6] test: hooks: Add QEMU configs for EFI app boards

Message ID 20260220213235.2112347-4-sjg@u-boot.org
State New
Headers
Series test: Add QEMU-based CI for EFI application boards |

Commit Message

Simon Glass Feb. 20, 2026, 9:32 p.m. UTC 
  From: Simon Glass <simon.glass@canonical.com>

Add test hook configurations for the four EFI application boards so
they can run under QEMU with UEFI firmware:

- efi-x86_app32: OVMF 32-bit (OVMF32_CODE_4M.fd), qemu-system-i386
- efi-x86_app64: OVMF 64-bit (OVMF_CODE_4M.fd), qemu-system-x86_64
- efi-arm_app64: AAVMF (AAVMF_CODE.fd), qemu-system-aarch64
- efi-riscv_app64: EDK2 RISC-V (RISCV_VIRT_CODE.fd),
  qemu-system-riscv64 with blockdev-style pflash and virtio-blk

All boards use the qemu.efi_app helper script to stage the EFI binary
and UEFI firmware. Add ellesmere symlinks as well.

Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com>
Signed-off-by: Simon Glass <simon.glass@canonical.com>
---

 test/hooks/bin/ellesmere/conf.efi-arm_app64_na   |  1 +
 test/hooks/bin/ellesmere/conf.efi-riscv_app64_na |  1 +
 test/hooks/bin/ellesmere/conf.efi-x86_app32_na   |  1 +
 test/hooks/bin/ellesmere/conf.efi-x86_app64_na   |  1 +
 test/hooks/bin/travis-ci/conf.efi-arm_app64_na   | 14 ++++++++++++++
 test/hooks/bin/travis-ci/conf.efi-riscv_app64_na | 16 ++++++++++++++++
 test/hooks/bin/travis-ci/conf.efi-x86_app32_na   | 14 ++++++++++++++
 test/hooks/bin/travis-ci/conf.efi-x86_app64_na   | 14 ++++++++++++++
 8 files changed, 62 insertions(+)
 create mode 120000 test/hooks/bin/ellesmere/conf.efi-arm_app64_na
 create mode 120000 test/hooks/bin/ellesmere/conf.efi-riscv_app64_na
 create mode 120000 test/hooks/bin/ellesmere/conf.efi-x86_app32_na
 create mode 120000 test/hooks/bin/ellesmere/conf.efi-x86_app64_na
 create mode 100644 test/hooks/bin/travis-ci/conf.efi-arm_app64_na
 create mode 100644 test/hooks/bin/travis-ci/conf.efi-riscv_app64_na
 create mode 100644 test/hooks/bin/travis-ci/conf.efi-x86_app32_na
 create mode 100644 test/hooks/bin/travis-ci/conf.efi-x86_app64_na
diff mbox series

Patch

diff --git a/test/hooks/bin/ellesmere/conf.efi-arm_app64_na b/test/hooks/bin/ellesmere/conf.efi-arm_app64_na
new file mode 120000
index 00000000000..8f4d76ce695
--- /dev/null
+++ b/test/hooks/bin/ellesmere/conf.efi-arm_app64_na
@@ -0,0 +1 @@ 
+../travis-ci/conf.efi-arm_app64_na
\ No newline at end of file
diff --git a/test/hooks/bin/ellesmere/conf.efi-riscv_app64_na b/test/hooks/bin/ellesmere/conf.efi-riscv_app64_na
new file mode 120000
index 00000000000..5bf928b9bd9
--- /dev/null
+++ b/test/hooks/bin/ellesmere/conf.efi-riscv_app64_na
@@ -0,0 +1 @@ 
+../travis-ci/conf.efi-riscv_app64_na
\ No newline at end of file
diff --git a/test/hooks/bin/ellesmere/conf.efi-x86_app32_na b/test/hooks/bin/ellesmere/conf.efi-x86_app32_na
new file mode 120000
index 00000000000..e5c78309c45
--- /dev/null
+++ b/test/hooks/bin/ellesmere/conf.efi-x86_app32_na
@@ -0,0 +1 @@ 
+../travis-ci/conf.efi-x86_app32_na
\ No newline at end of file
diff --git a/test/hooks/bin/ellesmere/conf.efi-x86_app64_na b/test/hooks/bin/ellesmere/conf.efi-x86_app64_na
new file mode 120000
index 00000000000..a0edb3778c9
--- /dev/null
+++ b/test/hooks/bin/ellesmere/conf.efi-x86_app64_na
@@ -0,0 +1 @@ 
+../travis-ci/conf.efi-x86_app64_na
\ No newline at end of file
diff --git a/test/hooks/bin/travis-ci/conf.efi-arm_app64_na b/test/hooks/bin/travis-ci/conf.efi-arm_app64_na
new file mode 100644
index 00000000000..aad3bae7290
--- /dev/null
+++ b/test/hooks/bin/travis-ci/conf.efi-arm_app64_na
@@ -0,0 +1,14 @@ 
+# SPDX-License-Identifier: MIT
+# Copyright 2026 Canonical Ltd.
+# Written by Simon Glass <simon.glass@canonical.com>
+
+console_impl=qemu
+qemu_machine="virt"
+qemu_binary="qemu-system-aarch64"
+qemu_extra_args="-m 1G -nographic -no-reboot -nic none -cpu max"
+qemu_kernel_args=""
+qemu_helper_script="efi_app"
+efi_fw_code="/usr/share/AAVMF/AAVMF_CODE.fd"
+efi_fw_vars="/usr/share/AAVMF/AAVMF_VARS.fd"
+reset_impl=none
+flash_impl=none
diff --git a/test/hooks/bin/travis-ci/conf.efi-riscv_app64_na b/test/hooks/bin/travis-ci/conf.efi-riscv_app64_na
new file mode 100644
index 00000000000..8811c1f6ac9
--- /dev/null
+++ b/test/hooks/bin/travis-ci/conf.efi-riscv_app64_na
@@ -0,0 +1,16 @@ 
+# SPDX-License-Identifier: MIT
+# Copyright 2026 Canonical Ltd.
+# Written by Simon Glass <simon.glass@canonical.com>
+
+console_impl=qemu
+qemu_machine="virt,pflash0=pflash0,pflash1=pflash1"
+qemu_binary="qemu-system-riscv64"
+qemu_extra_args="-m 1G -nographic -no-reboot -nic none"
+qemu_kernel_args=""
+qemu_helper_script="efi_app"
+efi_fw_code="/usr/share/qemu-efi-riscv64/RISCV_VIRT_CODE.fd"
+efi_fw_vars="/usr/share/qemu-efi-riscv64/RISCV_VIRT_VARS.fd"
+efi_use_blockdev=y
+efi_virtio_blk=y
+reset_impl=none
+flash_impl=none
diff --git a/test/hooks/bin/travis-ci/conf.efi-x86_app32_na b/test/hooks/bin/travis-ci/conf.efi-x86_app32_na
new file mode 100644
index 00000000000..49269cb3993
--- /dev/null
+++ b/test/hooks/bin/travis-ci/conf.efi-x86_app32_na
@@ -0,0 +1,14 @@ 
+# SPDX-License-Identifier: MIT
+# Copyright 2026 Canonical Ltd.
+# Written by Simon Glass <simon.glass@canonical.com>
+
+console_impl=qemu
+qemu_machine="pc"
+qemu_binary="qemu-system-i386"
+qemu_extra_args="-m 1G -nographic -no-reboot -nic none"
+qemu_kernel_args=""
+qemu_helper_script="efi_app"
+efi_fw_code="/usr/share/OVMF/OVMF32_CODE_4M.fd"
+efi_fw_vars="/usr/share/OVMF/OVMF32_VARS_4M.fd"
+reset_impl=none
+flash_impl=none
diff --git a/test/hooks/bin/travis-ci/conf.efi-x86_app64_na b/test/hooks/bin/travis-ci/conf.efi-x86_app64_na
new file mode 100644
index 00000000000..69a9dc20b41
--- /dev/null
+++ b/test/hooks/bin/travis-ci/conf.efi-x86_app64_na
@@ -0,0 +1,14 @@ 
+# SPDX-License-Identifier: MIT
+# Copyright 2026 Canonical Ltd.
+# Written by Simon Glass <simon.glass@canonical.com>
+
+console_impl=qemu
+qemu_machine="q35"
+qemu_binary="qemu-system-x86_64"
+qemu_extra_args="-m 1G -nographic -no-reboot -nic none"
+qemu_kernel_args=""
+qemu_helper_script="efi_app"
+efi_fw_code="/usr/share/OVMF/OVMF_CODE_4M.fd"
+efi_fw_vars="/usr/share/OVMF/OVMF_VARS_4M.fd"
+reset_impl=none
+flash_impl=none