diff mbox series

[Concept,10/12] x86: qemu: Enable MTRR setup for x86_64 no-SPL

Message ID 20260211143309.1183113-11-sjg@u-boot.org
State New
Headers
Series x86: Add single 64-bit U-Boot without SPL for QEMU |

Commit Message

Simon Glass Feb. 11, 2026, 2:32 p.m. UTC 
  From: Simon Glass <simon.glass@canonical.com>

The x86_64 no-SPL build does not programme MTRRs because
gd->arch.has_mtrr is never set to true. In the SPL-based flow,
SPL sets up the MTRRs during its init and they persist into U-Boot
proper. Without SPL, nothing sets them up.

Set has_mtrr in x86_cpu_init_f() for x86_64, and extend the
arch_cpu_init() guard in the QEMU board code to also cover
X86_16BIT_INIT so that it is called in the no-SPL path.

Co-developed-by: Claude Opus 4.6 <noreply@anthropic.com>
Signed-off-by: Simon Glass <simon.glass@canonical.com>
---

 arch/x86/cpu/qemu/qemu.c  | 4 +++-
 arch/x86/cpu/x86_64/cpu.c | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index b393205acb3..87e61558e8d 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -108,14 +108,16 @@  void qemu_chipset_init(void)
 	}
 }
 
-#if CONFIG_IS_ENABLED(X86_32BIT_INIT)
+#if CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_IS_ENABLED(X86_16BIT_INIT)
 int arch_cpu_init(void)
 {
 	post_code(POST_CPU_INIT);
 
 	return x86_cpu_init_f();
 }
+#endif
 
+#if CONFIG_IS_ENABLED(X86_32BIT_INIT)
 int checkcpu(void)
 {
 	return 0;
diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
index 25ae92c702f..610155d893c 100644
--- a/arch/x86/cpu/x86_64/cpu.c
+++ b/arch/x86/cpu/x86_64/cpu.c
@@ -61,6 +61,8 @@  int x86_cpu_reinit_f(void)
 
 int x86_cpu_init_f(void)
 {
+	gd->arch.has_mtrr = true;
+
 	return 0;
 }